Getting Started with Questa Verification IP for Protocols
The best way to create a System on a Chip is with design IP: blocks that perform common functions such as interfaces to standard…
10/08/2023
Tag: Siemens EDA
PCB design best practices: thermal analysis
Designing today’s complex PCB is no easy task. It requires a full understanding of the basics of PCB design, a mastery of your CAD…
04/08/2023
Frequently asked questions about PADS Professional Premium DFM
A best-practice strategy to keep your projects on time and on budget is to test them for compliance with your manufacturer’s capabilities before you…
02/08/2023
Calibre Auto-Waivers
The Calibre Auto-Waivers tool provides fast, accurate, automated recognition, removal, and tracking of waived design rule violations during DRC. It eliminates costly time and…
15/07/2023
Calibre 3DSTACK
Extending physical verification from the IC world to the advanced packaging world to improve multi-die package manufacturability. Use one Calibre 3DSTACK cockpit for assembly-level…
15/07/2023
Calibre Multi-Patterning
Comprehensive industry-leading technology for Calibre multi-patterning decomposition, verification, and error debugging. Supports all major foundry methodologies and processes, and provides unique tool integrations and…
15/07/2023
Calibre Pattern Matching
At Calibre Pattern Matching, SoC designers must balance customization of SRAM for better performance against potential impacts on yield. Enhancing SRAM debugging with pattern…
15/07/2023
Calibre nmDRC Recon
The Calibre nmDRC Recon technology reduces iteration and debug time by minimizing the rules and data required for DRC in early design iterations. Results…
15/07/2023
