During system-on-chip (SoC) development, Physical Verification (PV) is a critical verification step before a design proceeds to tapeout.
At each verification iteration, PV reports document the design’s status at different levels of detail, serving a range of stakeholders, including design engineers, block owners, project managers, and SoC owners.
This information helps teams track progress, identify outstanding issues, and make informed decisions before finalizing the design.
1. Challenges in Physical Verification Reporting
One of the major challenges in Physical Verification reporting is the lack of standardization in how information is compiled and presented.
Different stakeholders may interpret the term “report” differently depending on their roles and requirements. This can lead to inconsistencies when information is communicated among members of the design team.
The issue becomes more significant when teams need to build their own reporting infrastructure to consolidate and present PV results. This process can require considerable time and effort, particularly when different teams or projects use different reporting methods.
2. Standardizing Physical Verification with Calibre RVE
Calibre RVE addresses this challenge by enabling the generation of standardized HTML reports for DRC and other flows that use ASCII-based result databases. The solution combines automation with customization capabilities, helping teams present PV information consistently and share it more easily with stakeholders at different levels.
By giving individual team members control over PV status reporting, Calibre RVE simplifies report creation and sharing, helping teams work more efficiently toward on-time tapeout.
3. Simplifying Physical Verification Result Communication
With Calibre RVE HTML reports, PV results can be presented in a more consistent reporting format, making information easier for stakeholders to access and use.
The solution combines automated reporting with needs-based customization, helping design teams:
- Generate PV result reports more easily.
- Customize reports to meet different reporting requirements.
- Reuse reports in subsequent verification iterations.
- Improve information sharing and communication across teams.
- Reduce the time and effort required to build reporting infrastructure.
As a result, Physical Verification status reporting becomes simpler and more flexible throughout the SoC development process.
4. Supporting On-Time Tapeout
PV reports are important assets throughout SoC development, particularly during the final verification iterations before tapeout. The information they provide helps team members monitor the current design status and coordinate efforts to resolve outstanding issues.
However, if building and maintaining reporting infrastructure requires too much time, design teams may have to devote resources to reporting tasks instead of focusing on verification and design completion.
Calibre RVE HTML reporting helps address part of this challenge by providing a standardized reporting approach while allowing users to customize and reuse reports.
This enables businesses to improve coordination throughout the Physical Verification process, supporting IC design development from successive verification iterations through to the goal of on-time tapeout.
Read more:
- Accelerate Semiconductor Chip Design with Siemens Calibre
- Easily Manage Multiple Verification Jobs with Calibre
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