Full-chip-Heatmap

Calibre Vision AI: More Efficient DRC Analysis and Debugging in IC Design

As IC and SoC designs become larger and more complex, physical verification is becoming one of the more time-consuming stages of chip development. Particularly…
13/10/2026
Calibre-Vision-AI-tang-toc-thiet-ke-PCB-va-IC

Siemens EDA AI: How AI is transforming IC and PCB design?

As IC and PCB designs become increasingly complex, demands for computing power, simulation, and verification continue to grow. Optimizing workflows and reducing processing time…
10/10/2026
Valor CAM350 cho kiểm tra DFM và chuẩn bị dữ liệu sản xuất PCB

Valor CAM350: DFM Analysis and PCB Manufacturing Data Preparation

From design data to finished boards, Siemens offers an industry-standard CAM toolset that helps PCB fabricators verify, optimize and generate manufacturing data within a…
28/09/2026
xpedition-standard-rut-ngan-50-chu-ky-thiet-ke-pcb

Xpedition Standard: Optimizing PCB Design Cycles by Up to 50%

Modern PCB design workflows are becoming increasingly complex, placing immense pressure on businesses regarding product development costs and time-to-market. Join Vietbay in the article…
28/09/2026

3D ICs in the AI Era: 6 Technology Shifts Reshaping Semiconductor Design and Advanced Packaging

The rapid growth of AI and high-performance computing is placing increasing pressure on traditional semiconductor architectures. As continued transistor scaling becomes more challenging, the…
16/09/2026

Thermal Optimization for 3D ICs: From Hotspot Detection to Chip–Package–System Co-Design

When multiple dies are vertically integrated in a 3D IC architecture, thermal management can no longer be treated as a late-stage design issue. High…
16/09/2026
toi-uu-tu-dong-dinh-tuyen-pcb-voi-tri-tue-con-nguoi

Automate PCB Routing with Siemens Xpedition and Human Intelligence

The rapid pace of innovation in the electronics industry is placing increasing demands on PCB design workflows. Engineers must shorten design cycles while ensuring…
13/09/2026

Calibre RVE: Standardize Physical Verification Reports for On-Time Tapeout

During system-on-chip (SoC) development, Physical Verification (PV) is a critical verification step before a design proceeds to tapeout. At each verification iteration, PV reports…
10/09/2026