In the context of increasingly complex IC design, reducing turnaround time, optimizing physical verification processes, and ensuring sign-off quality are key factors in accelerating time-to-market.
Calibre Workshop delivers practical insights and advanced solutions from Siemens EDA Calibre – the industry-standard physical verification platform, widely recognized as the final sign-off tool in chip design flows (DRC/LVS/PERC…).
Key Speaker: Brad Pu – Calibre Expert, Siemens EDA
With more than 20 years of experience in physical verification, including work at a leading semiconductor foundry and joining Mentor Graphics (now Siemens EDA) in 2006, Brad Pu will share real-world best practices to help organizations work faster, leaner, and more efficiently with Calibre.
By joining the workshop, you will:
✔️ Learn about the latest technologies that accelerate DRC/LVS and significantly reduce verification time
✔️ Simplify the backend sign-off process while maintaining high reliability
✔️ See live demos and deployment experience directly from Siemens EDA experts
✔️ Connect and exchange insights with the IC design engineering community
Time: 2:00 – 3:00 PM | Monday, February 2, 2026
Location: Vietnam Semiconductor Innovation Center (V.S.I.C) 10th Floor, NIC Building, Alley 7, Ton That Thuyet Street, Cau Giay District, Hanoi, Vietnam
Don’t miss the Calibre Workshop – where you can access leading physical verification technology in IC design, helping to shorten turnaround time and optimize designs before manufacturing.
